In a semiconductor device manufacturing process, an etching target film (e.g., an interlayer insulating film or a metal film) formed on a substrate such as, for example, a semiconductor wafer is etched using a resist film as a mask material and a step of patterning the etching target film into a predetermined pattern is performed.
Meanwhile, attention has been recently paid to a Cu multilayer wiring technique using a low dielectric constant film (low-k film) as an interlayer insulating film, and in this Cu multilayer wiring technique, a dual Damascene method is adopted in which a buried wiring trench or hole is formed in the low-k film and Cu is buried therein. For the low-k film, an organic film is frequently used. When such an organic low-k film is etched, since a sufficient selection ratio with a resist film, which is the same organic film, cannot be obtained, an inorganic hard mask film such as, for example, a Ti film or a TiN film, is used as a mask material for etching. That is, the hard mask film is etched into a predetermined pattern using the resist film as a mask material, and the low-k film is etched using the hard mask film etched into the predetermined pattern, as a mask material.
It is required to remove an unnecessary adhered substance such as, for example, a resist film or a hard mask film remaining on the substrate after etching. The removal of the unnecessary adhered substance is performed, for example, while spreading the removal liquid over the entire surface of the semiconductor wafer by a centrifugal force by continuously supplying a removal liquid to the center of a semiconductor wafer while rotating the semiconductor wafer serving as a processing target substrate using a single wafer type cleaning apparatus (see, e.g., Japanese Patent Laid-open Publication Nos. 2004-146594, 2010-114210, and 2013-207080).